dan_envgen_notes.html

Hi Aaron,


I have had a heck of a time with the 208-3 Envelope generator.
It works great, but the transient/sustained functionality is flawed in my prototypes. I had to make a design change, thought I’d tell you about it for your notes.


Using Don’s original schematics:


C11, the 100pF cap, is designed to feed back a bit of voltage to the rising side of the circuit when you are ‘holding’ with a 5V gate at the pulse in. IC3’s four stages are attack, first half of sustain, second half of sustain, and decay. But, if you are in sustained mode and feeding in 5V, there is a point at the end of the sustain phase where no part of IC3 is turned on, and you are in the hold pattern. The decay won’t start until you remove the 5V input.


Unfortunately, this doesn’t work right in any of my prototypes. If you remove C11 entirely, it works perfectly without the sustained mode being available. Anything over about 50pF resulted in the sustain stage never ending at all if the sustain and decay stages were turned up to long times.


Sustained
mode won’t hold on to proper output level unless C11 is at least 340pF in my prototypes.


So, I really needed this capacitor to be present only during sustained modes and I needed it to be a higher value.


I used a DG418DJ, which is a SPST CMOS switch, to break the circuit entirely that the cap is on when not in use. Pin 10 of IC4 fed the input of the switch, so when you were not holding 5V at the pulse input, the cap is out of the equation. Just put it inline with C14 and the cap is removed from the circuit while not holding 5V on the pulse in.


Unfortunately, this introduced another problem — the attack/sustain timing was variant with the cap in and out of the circuit. With the attack at .002sec or 10sec, the result was negligible, the variation was significant at about 1.5sec — with the cap in line, attack was .7sec while it was 1.5sec while the cap was not in line. If I switched the 5V hold on and off, the attack looked like a staircase on the scope.


So, I modified the circuit again — the cap is only in the circuit when the Attack or two sustain phases are not used (I used a 3 input NOR on pins 6, 5, and 12 of IC3) AND you are applying 5V to pin 12 of IC4. I would have loved to have done this easier, but in that hold pattern none of the phases are active at all, so the only way to know I was in no-mans land (or decay, where it doesn’t matter).


Now, all phases are consistent, a 30sec envelope does not hang ever, and the sustain mode works as it should. I kept C11 value at a minimum to prevent it from changing the length of the envelope.


I don’t know if you ended up modifying your circuit, but from what I can tell — the buchla design has issues, or something was different in the 70s.


-Dan